The present invention relates to a semiconductor chip soldering land pattern for soldering a semiconductor chip on a substrate and to a soldering method for forming a circuit.
In control circuits for various electronic equipment as used in vehicles and industrial equipment, semiconductor devices comprised of bare chips are mounted on electrode or circuit patterns formed on a substrate such as a circuit board. This obtains the desired performance of the semiconductor devices by shortening the wiring distance. This minimizes electric resistance and achieves efficiency of production processes and permits high-density mounting. Such bare chips are sealed with resin after being soldered onto the electrode or circuit patterns of the substrate.
In mounting semiconductor devices such as those bare chips on the substrate, after the conductor pattern is formed on the substrate, the entire substrate surface is coated with a solder resist to cover the conductor pattern. Then portions of the solder resist is opened to form a bare chip mounting section referred to as a land pattern for receipt of the bare chip. This opening land pattern is generally of a slightly larger size than that of the bare chip to be inserted. The clearance is generally about 0.1 mm.
However, when a conventional semiconductor chip soldering land pattern is used, at the time of the melting of solder and insertion of the bare chip the displacement of the liquid solder causes the bare chip to roll and slant. This causes the jointed chip to be displaced or inclined in and/or from the horizontal plane of the substrate surface.
Conventionally, positioning jigs formed from carbon plates have been used to prevent such displacement and inclination. These positioning jigs are formed with an opening approximately corresponding to the chip shape. When soldering, the semiconductor chip is inserted in the jig opening and is aligned for mounting on the substrate. Pressure is then applied to position and hold the solder when in the molten state. Thus, the semiconductor chip is joined onto the substrate in position without any displacement or inclination.
However, when such a positioning jig is used, the jig itself needs to be formed with high accuracy. Also and the number of jigs required is increased if different size semiconductors are to be mounted. This also increases the man-hours required in the soldering joint process. Thus the resulting cost is increased and assembly is complicated.
Therefore a principal object of the present invention is to provide a semiconductor chip soldering method and structure that places the semiconductor chip in position with high accuracy in a simple constitution and without using any positioning jigs.